1. Field of the Invention
The present invention is related to a frequency generation circuit, and more particular to a frequency jitter generation circuit.
2. Description of Related Art
The handling of noise and electromagnetic interference (EMI) are unavoidable challenges in high speed circuit design. EMI is the disturbance due to electromagnetic radiation emitted from an operating electronic device, which affects other electronic devices. Due to ever increasing operating frequency of modern electronic devices, the phenomenon of EMI becomes more severe. In practice, as EMI peak value exceeds the regulation defined by United State Federal Communication Committee (FCC), other electronic devices might be interfered by the overly-strong electromagnetic radiation to affect the operation and performance of the electronic devices.
Currently, most of the electronic devices generate operating frequency signals by using an oscillator circuit. Please refer to FIG. 1, which is a circuit diagram showing a frequency generation circuit (i.e. the oscillator circuit) of the prior art. As shown, the oscillator circuit 1 generates a frequency signal f based on an upper reference voltage VH and a lower reference voltage VL. The oscillator circuit 1 includes a comparator 11, a capacitor C, a first current source i1, and a second current source i2. The capacitor C is coupled to the inverting input terminal of the comparator 11. The non-inverting input terminal of the comparator 11 is coupled to a voltage source of the upper reference voltage VH and a voltage source of the lower reference voltage VL. The upper reference voltage VH and the lower reference voltage VL are used as comparison value for charging and discharging the capacitor C, respectively. The first current source i1 is coupled to the capacitor C for charging the capacitor C, and the second current source i2 is coupled between the capacitor C and a ground node for discharging the capacitor C.
At first, the frequency signal f is at high level and a control signal o1 is generated to turn on the switches q1 and q3 simultaneously, which causes the oscillator circuit 1 entering the charging mode. At this time, the comparator 11 adopts the upper reference voltage VH, which is input to the non-inverting input terminal, as the comparison value. Then, the first current source i1 begins to charge the capacitor C. When the voltage level stored in the capacitor C exceeds the upper reference voltage VH, the comparator 11 reverses the frequency signal f so as to generate a control signal o2 to turn on the switches q2 and q4 and to generate the control signal o1 to turn off the switches q1 and q3. As the switches q2 and q4 being conducted in addition to the switches q1 and q3 being turned off, the comparator 11 adopts the lower reference voltage VL, which is input to the non-inverting input terminal, as the comparison value so as to cause the oscillator circuit 1 entering the discharge mode. Meanwhile, the second current source i2 establishes a current path to discharge the capacitor C. Then, when the voltage level stored in the capacitor C falls below the lower reference voltage VL, the comparator 11 reverses the frequency signal f to turn on the switches q1 and q3 and turn off the switches of q2 and q4 once more and thus complete a cycle. The above mentioned charging and discharging operation of the capacitor C are repeated. In addition, the voltage level stored in the capacitor C is restricted to oscillate between the upper reference voltage VH and the lower reference voltage VL by the above mentioned mechanism.
However, in the above mentioned oscillator circuit 1, because the upper reference voltage VH and the lower reference voltage VL are constant, charging and discharging periods of the capacitor C are fixed. As shown in FIG. 2A, once the voltage level of the capacitor C reaches the upper reference voltage VH, the capacitor C begins to discharge, and once the discharging of the capacitor C led to a voltage level lower than the lower reference voltage VL, the capacitor C begins to be charged. As every discharging and charging periods are kept the same, the frequency of the frequency signal f is thus fixed. As shown in FIG. 2B, the time of high level t1 and the time of low level t2 on the wave of the frequency signal f are fixed, and thus waveform of the frequency signal f on the frequency spectrum is concentrated. As shown in FIG. 2C, the frequency signal f is concentrated to a constant main frequency m. Thus, the electronic device with the frequency generating circuit mentioned above may radiate electromagnetic wave having most of the power lies at the main frequency thereby result in EMI problems.